In recent years, researches on formation of insulated-gate semiconductor devices (MOSFETs) on an insulating substrate have been earnestly conducted. Such formation of a semiconductor integrated circuit on an insulating substrate is advantageous for high-speed operation, for the following reason. The speed of the prior art semiconductor integrated circuit has been mainly restricted by the stray capacitance between each conductive interconnect and the substrate. On the other hand, such stray capacitance does not exist on an insulating substrate. A MOSFET formed on an insulating substrate and having an active layer in the form of a thin film is known as a thin-film transistor (TFT). In the prior art semiconductor integrated circuit, TFTs are used as load transistors for an SRAM, for example.
Recently, a commercial product comprising a semiconductor integrated circuit which is required to be formed on a transparent substrate has emerged. Examples of this product include circuits for driving optical devices such as liquid crystal displays and image sensors. TFTs are also used in these driver circuits. Since these circuits are required to be formed in a large area, there is a demand for a decrease in the temperature of the TFT fabrication process. Furthermore, where a device has numerous terminals on an insulating substrate, if the terminals must be connected with a semiconductor integrated circuit, one might consider to form the first stage of the semiconductor integrated circuit or the semiconductor integrated circuit itself on the same insulating substrate monolithically to increase the packaging density.
Conventionally, the crystallinity of TFTs has been improved by annealing an amorphous, semi-amorphous, or crystallite semiconductor film at a temperature of 450.degree.-1200.degree. C. Thus, a good semiconductor film, i.e., having sufficiently high mobilities, is obtained. Some amorphous TFTs comprise a semiconductor film made of an amorphous material. However, their mobilities are lower than 5 cm.sup.2 /V.multidot.s, normally as low as about 1 cm.sup.2 /V.multidot.s. Their operating speed and inability to fabricate P-channel TFTs have restricted their use severely. Anneal at the above-described temperature has been needed to obtain TFTs having mobilities exceeding 5 cm.sup.2 /V.multidot.s. Also, the anneal permitted fabrication of P-channel TFTs (PTFTs). These thermal annealing steps can be carried out by the use of irradiation of laser light or intense light.
However, it has been pointed out that these TFTs do not have sufficiently high reliability to be used in an active-matrix device because of large leakage current in OFF state. Accordingly, we have proposed improved methods as described in Japanese Patent application Ser. Nos. 34194/1992 and 30220/1992. Specifically, gate electrodes are made of a low-resistivity metal such as aluminum. The surface of each gate electrode is anodized so that the surface is coated with an oxide. Using this lamination of the metal and the oxide as a main mask, impurities are implanted to form an offset region. As a result, the leakage current is reduced. Also, the interlayer insulation is enhanced by the anodic oxide film. Consequently, short circuit at the crossing portions can be greatly reduced.
More specifically, the film of the anodic oxide has only a small number of pinholes and can withstand high voltages greater than 7 MV/cm. Hence, interlayer insulation is secured. In practice, we have succeeded in greatly reducing short circuit between interconnections, by utilizing the techniques described in the above-cited Japanese Patent application Ser. Nos. 34194/1992 and 30220/1992. This is quite important in active-matrix regions because interconnections cross each other at very numerous locations.
However, we have discovered that technically very difficult problems occur when one attempts to fabricate a device on which an active-matrix device and its peripheral driver circuit are monolithically formed (e.g., a memory or an AMLCD), using the above-described technique.
Generally, a peripheral circuit is complex in structure and has interconnects connected in a complex manner. Therefore, even if one attempts to coat metal electrodes with an anodic oxide, it is impossible to supply electric power because of the complexity of the interconnect structure. Also, if interconnects used only for supply of electric power are formed, then an extra photolithography step is necessary to remove these interconnects. This results in a decrease in the manufacturing yield. If a circuit is constructed together with these extra interconnects, then the device density is deteriorated severely.
In another proposed method, an anodic oxidation step is used to fabricate an active-matrix circuit portion. The anodic oxidation step is not employed when a peripheral circuit portion and other regions are formed. This method suffers from a very low production yield. It has been found that the main cause is the presence of numerous pinholes because the interlayer insulator is incomplete. The pinholes cause short circuits between an upper interconnect and a lower interconnect (i.e., a gate electrode and its interconnect).
This is an essential problem where interconnects of a metal having a low melting point are used. It is well known that aluminum and their alloys are excellent electrode materials. If impurity atoms are implanted into an active layer using gate electrodes made of such a material as a mask by a self-aligning process, then activation utilizing thermal annealing at a temperature of 630.degree. C. or higher cannot be adopted. Therefore, it is inevitable that a low-temperature activation technique such as laser annealing is used to activate the impurity atoms. Furthermore, a technique of forming an interlayer insulator film above 560.degree. C. cannot be adopted.
For example, an interlayer insulator material such as silicon oxide formed by LPCVD or atmospheric-pressure CVD at a substrate temperature above 560.degree. C. contains a quite small number of pinholes. Also, almost no short circuit occurs between interconnects. However, at low temperatures below 560.degree. C., only sputtering or plasma CVD can be used. In these methods, a large amount of dust is deposited onto the film during its growth. This increases the number of pinholes. Also, the resulting insulation is not satisfactory. Even in a peripheral driver circuit, interconnects cross each other. Therefore, in order to improve the production yield, there is a demand for a method of forming an anodic oxide with an improved production yield.